\doxysubsubsubsection{RCCEx USB Clock Source }
\hypertarget{group___r_c_c_ex___u_s_b___clock___source}{}\label{group___r_c_c_ex___u_s_b___clock___source}\index{RCCEx USB Clock Source@{RCCEx USB Clock Source}}
\doxysubsubsubsubsubsection*{Macros}
\begin{DoxyCompactItemize}
\item 
\Hypertarget{group___r_c_c_ex___u_s_b___clock___source_ga7c8ae5c57a3a902a17308812ea888cf5}\label{group___r_c_c_ex___u_s_b___clock___source_ga7c8ae5c57a3a902a17308812ea888cf5} 
\#define {\bfseries RCC\+\_\+\+USBCLKSOURCE\+\_\+\+PLL}~RCC\+\_\+\+CDCCIP2\+R\+\_\+\+USBSEL\+\_\+0
\item 
\Hypertarget{group___r_c_c_ex___u_s_b___clock___source_ga40ed0e91776c6dab9de2978a30a44190}\label{group___r_c_c_ex___u_s_b___clock___source_ga40ed0e91776c6dab9de2978a30a44190} 
\#define {\bfseries RCC\+\_\+\+USBCLKSOURCE\+\_\+\+PLL3}~RCC\+\_\+\+CDCCIP2\+R\+\_\+\+USBSEL\+\_\+1
\item 
\Hypertarget{group___r_c_c_ex___u_s_b___clock___source_gab07d0cd905b63a05c953bc6e0daa9982}\label{group___r_c_c_ex___u_s_b___clock___source_gab07d0cd905b63a05c953bc6e0daa9982} 
\#define {\bfseries RCC\+\_\+\+USBCLKSOURCE\+\_\+\+HSI48}~RCC\+\_\+\+CDCCIP2\+R\+\_\+\+USBSEL
\end{DoxyCompactItemize}


\doxysubsubsubsubsection{Detailed Description}
